1. Field of the Invention
The invention relates to flash memories, and more particularly to controllers of flash memories.
2. Description of the Related Art
A flash memory is a nonvolatile memory which can be electrically erased and programmed. A flash memory is mainly used in a memory card and a universal serial bus device for general data storage. A flash memory comprises a plurality of memory units, each of which is for data storage. A flash memory is divided into two categories comprising a single-level-cell (SLC) flash memory and a multiple-level-cell (MLC) flash memory. A memory cell of an SLC flash memory can only store 1-bit data. A memory cell of an MLC flash memory stores multiple bits of data.
Data is written into a flash memory in a unit of a page. When a controller writes data to a target page of a flash memory, stability of data stored in the neighboring page of the target page is affected by the data content written to the target page. Referring to FIG. 1A, a circuit diagram of a portion of an SLC flash memory 100 is shown. The SLC flash memory 100 comprises a plurality of columns of memory units 101˜104, 111˜114, 121˜124, . . . , 1N1˜1N4. Each memory unit can only store one-bit data. The controller first stores N-bit data in the first page 11 of the flash memory 100, and then stores N-bit data in the second page 12 of the flash memory 100. The memory cells 101, 111, 121, . . . , 1N1 of the first page are respectively neighboring to the memory cells 102, 112, 122, . . . , 1N2 of the second page. When the memory cells 101, 111, 121, . . . , 1N1 store different bit values from those stored in the memory cells 102, 112, 122, . . . , 1N2, because neighboring memory cells have opposite electronic characteristics, data stored in the first page and the second page has high stability. When the memory cells 101, 111, 121, . . . , 1N1 store the same bit values as those stored in the memory cells 102, 112, 122, . . . , 1N2, because neighboring memory cells have similar electronic characteristics, data stored in the first page and the second page has low stability.
Referring to FIG. 1B, a schematic diagram of a probability distribution of a threshold voltage of a memory cell of a MLC flash memory is shown. Assume that a memory cell of a MLC flash memory can store two data bits. When the two data bits are (0, 0), the threshold voltage roughly has a level t1, when the two data bits are (0, 1), (1, 0), and (1, 1), the threshold voltage roughly has levels of t2, t3, and t4. When the controller stores data, corresponding data bits of neighboring pages, such as a third bit of a first page and a third bit of a second page, are stored in a memory cell of the MLC flash memory. Referring to FIG. 1B, when corresponding data bits of neighboring pages are (0, 0) or (1, 1), because the threshold voltage of the memory cell has the level t1 or t4, the data bits have high stability. When corresponding data bits of neighboring pages are (0, 1) or (1, 0), because the threshold voltage of the memory cell has the level t2 or t3, the data bits have low stability.
According to the embodiments shown in FIGS. 1A and 1B, flash memories may have different circuit structures to store different bit contents to increase data stability. Thus, a controller of a flash memory is required to dynamically change contents of data to be stored to the flash memory according to circuit structure of the flash memory, thereby increasing data stability of the flash memory.